Xilinx

Xilinx Single-Chip Solution with On-Chip Redundancy for Functional Safety Speeds

Xilinx announced a single-chipZynq®-7000 All Programmable SoC functional safety solution to help customers shorten time to IEC 61508 compliance and certification across many industrial applications like IIoT Edge Controllers, Motor Drives, Intelligent IOs, Smart Sensors, Gateways, Industrial Transport, and Electrical Grids.

The solution includes a hardware design based on a single-chip SIL 3 and HFT=1 architecture with a complete set of supporting documentation, assessment reports, IP and software tools. By utilizing these resources, customers can significantly reduce their own risk and reduce certification and development times by as much as 24 months. As well, Xilinx’s single-chip solution will help cut systems cost by more than 40%; customers previously needed to leverage two or more devices to achieve the reliability and redundancy requirements outlined in IEC 61508.

The Zynq-7000 SoC is the first single-chip application processor to integrate safety and non-safety functionality onto a single device and pass assessment by functional safety authority TÜV Rheinland for addressing the on-chip redundancy requirements outlined in Part 2 Annex E of the IEC 61508 international standard.

“We defied what was thought and said to be impossible, and are the first company to have implemented a safety architecture that integrates SIL3 and HFT=1 together with non-safety applications into a single chip,” says Christoph Fritsch, Director of Market Segments Industrial/Scientific/Medical at Xilinx. “We are extremely proud of this milestone and honoured to be recognized by the many industry-leading companies involved in the project. Our goal was to help our customers by developing SIL3 design flows for highest integration and productivity that are not only documented but certifiable.”

The single-chip safety solution and resources are available through Xilinx’s web-based Functional Safety Lounge where licensed subscribers will have access to updates around continual efforts to evolve architectures, tool flows, and documentation including future reports and assessments.

 

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